EDN

First LVDS Receiver to Support a 4-MHz Pixel Clock

The SN65LVDS822 is an advanced FlatLink™ LVDS receiver designed on a modern CMOS process. It has several unique features, including three selectable CMOS output slew rates, CMOS output voltage support ...
EDN

CMOS or LVDS DDR Digital Outputs

The ADC1115S125 is a single channel 11-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performance and low power consumption at sample rates up to 125 Msps.The ADC1115S125 is a single ...
Electronic Design

High-Speed Converter Survival Guide: Digital Data Outputs

Today’s designers have a multitude of ADC choices that provide different digital outputs. This second article in the JESD204 series covers the different types of outputs in terms of physical ...
Electronic Design

Interfacing FPGAs to an ADC’s Digital Data Output

Different types of interface standards used in LVDS. Recommendations for interfacing FPGAs to ADCs. Methods of troubleshooting when connecting to the AD9268 ADC. 1. Multiple interface possibilities ...